Semiconductor chips are commonly provided in packages which physically protect the semiconductor chip itself and which facilitate mounting of the chip to a circuit panel. Significant development has occurred in such packages, so as to reduce the size of the package relative to the size of the chip itself, and to provide packages which are compatible with modern circuit panel assembly techniques such as surface-mounting.
Semiconductor chips ordinarily are generally planar, thin elements having a front surface with contacts thereon connected to the internal semiconductor elements of the chips, an opposite, rear surface and edges extending between these front and rear surfaces. As used herein with reference to a semiconductor chip, the term “area” refers to the area of the front or rear surface of the chip. Certain chips, commonly referred to as “chip size packages” occupy an area of the circuit panel equal to the area of the chip itself, or only slightly larger than the area of the chip itself. Certain semiconductor chips have been provided heretofore in stacked arrangements so that the chips are superposed on one another, with the front or rear surface of one chip facing toward the front or rear surface of another chip. In many cases, the chips are functionally related to one another, so that they must be interconnected to one another. Such a stacked assembly can incorporate some or all of the required interconnections between the chips and, in some cases, can be prefabricated so that the stacked assembly may be handled, stocked and assembled to a larger circuit panel as a unit.
Stacking chips in this manner reduces the aggregate area of the circuit panel occupied by the chips. However, stacked chip arrangements suffer from some drawbacks with respect to heat dissipation. All else being equal, two chips mounted in a stacked arrangement will normally have higher internal temperatures than two individual chips mounted on separate portions of the circuit board. In some cases, this drawback precludes the use of stacked chips or requires expensive special cooling measures.
It is particularly desirable to provide a logic chip such as a processor or, particularly, a field programmable gate array (“FPGA”) in a stacked package with memory used in conjunction with the logic chip. FPGAs typically are used with external memory chips. In some cases, the FPGA incorporates a small internal memory adequate for some applications, but not adequate for all applications. In other cases, the FPGA incorporates no internal memory at all. Because the FPGA exchanges large amounts of data at frequent intervals with the external memory, it is important to minimize signal propagation delays between the FPGA and the external memory chip. Also, numerous signal lines are required for this data interchange. If the FPGA and the external memory chip are both mounted separately on a circuit panel, the circuit panel must accommodate all of these signal lines, which may require a complex circuit panel with numerous layers of conductive traces. This, in turn, significantly increases the costs and reduces the reliability of the overall assembly.